Hardware Design Engineer Path

Du schéma au PCB routé.
.
5–16
sem.
3
levels
39+
modules

1

Level 1 — Fondamentaux

HW Interface MCU

GPIO, pull-up/down, ESD.

4h

STM32 Architecture

Clock tree, power.

8h

Analog Basics

ADC/DAC, filtrage.

4h

PCB Basic

Couches, vias, stack-up.

4h

HW Constraints

Thermique, découplage.

4h

KiCad Schematic

Symboles, netlists.

8h

KiCad Routing

Layout, DRC, Gerber.

8h
2

Level 2 — Intermédiaire

HW Interface MCU 2

SDIO, FMC, DCMI.

4h

STM32 Architecture 2

Bus matrix, MPU.

8h

Analog Advanced

AOP, LDO/DCDC.

4h

Signal Integrity

Crosstalk, eye diagrams.

8h

EMC

Shielding, CE/FCC.

4h

Transmission Lines

Microstrip, impédance.

4h

HW Constraints Avancé

Via stitching, DFM.

4h

KiCad Schematic Avancé

Multi-feuilles, BOM.

8h

KiCad Routing Avancé

Diff pairs, impedance.

8h

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